1) Field of the Invention
This invention relates generally to fabrication of a passivation layer composed of Silicon dioxide and oxynitride for a semiconductor device and more particularly to a process for forming a silicon dioxide-oxynitride continuity film that is part of a has three layers as a passivation film, inter metal dielectric or interlevel dielectric layer.
2) Description of the Prior Art
Once all the steps required to fabricate a working integrated circuit are completed, there still remains the important step of passivating the circuit, this is protecting it form possible contamination during its operating lifetime. Passivation layers are formed over metal lines to protect the metal lines and underlying semiconductor devices from moisture and other contaminants. It is known in the art to use two individually deposited layers for this purpose. One layer, such as silicon nitride and a second layer such as phosphosilicate glass (PSG) as a scavenger to neutralize contaminants already present.
However, current passivation layers formed of silicon nitride create too much stress on the metal lines and cause defects. Therefore, there is a need for a process to form a passivation layer that creates less stress and also has superior contamination and diffusion barrier properties.
The importance of overcoming the various deficiencies noted above is evidenced by the extensive technological development directed to the subject, as documented by the relevant patent and technical literature. The closest and apparently more relevant technical developments in the patent literature can be gleaned by considering U.S. Pat. No. 5,616,401 (Kobayashi) shows a oxynitride layer used as a oxidation mask for a field oxide process. U.S. Pat. No. 4,901,133 (Curran et al.) shows a Si rich SiON layer over a poly line.